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Guild: wafer.space Community
Channel: 🏗️ - Designing / digital / 3v3 cell library
After: 04/30/2026 23:59
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[05/28/2026 07:36] rebelmike
Hi @Tholin, I’m looking to use your cell library in the next run. I was doing an initial port last night and saw there aren’t latch or clock gate cells. This isn’t a show stopper, but especially a latch would be good to have.
Do you have any plans to add them?


[05/28/2026 14:17] tholin
There are latch cells in the library, but you have to manually instantiate them as they lack characterization data.


[05/28/2026 14:17] tholin
You have to exclude all paths through the latches in STA


[05/28/2026 14:17] tholin
You’re on your own for making the timing work


[05/28/2026 19:24] rebelmike
Awesome, thanks - I see them there now.  The way this particular thing is using them timing shouldn't matter.


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